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|Title:||Impact of Dynamic Voltage Scaling and Thermal Factors on FinFET-based SRAM Reliability|
|Authors:||Rosa, F. R.|
Brum, R. M.
|Presented at:||IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 5-9 December 2015, Cairo, Egypt.|
|Publisher:||Institute of Electrical and Electronics Engineers (IEEE)|
|Citation:||Proceedings of 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 137-140|
|Abstract:||FinFET technology appears as an alternative solution to mitigate short-channel effects in traditional CMOS down-scaled technology. Emerging embedded systems are likely to employ FinFET and dynamic voltage scaling (DVS), aiming to improve system performance and energy-efficiency. This paper claims that the use of DVS increases the susceptibility of FinFET-based SRAM cells to soft errors under radiation effects. To investigate that, a methodology that allows determining the critical charge according to the dynamic behaviour of the temperature as a function of the voltage scaling is used. Obtained results support our claim by showing that both temperature and voltage scaling can increase up to five times the susceptibility of FinFET-based SRAM cells to the occurrence of soft errors.|
|Rights:||Copyright © IEEE, 2015. This is an open-access article distributed under the terms of the Creative Commons Attribution-Non Commercial-No Derivatives License (http://creativecommons.org/licenses/by-nc-nd/4.0/ ), which permits use and distribution in any medium, provided the original work is properly cited, the use is non-commercial and no modifications or adaptations are made.|
|Appears in Collections:||Conference Papers & Presentations, Dept. of Engineering|
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