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Title: Impact of Dynamic Voltage Scaling and Thermal Factors on FinFET-based SRAM Reliability
Authors: Rosa, F. R.
Brum, R. M.
Wirth, G.
Ost, Luciano
Reis, R.
First Published: 2015
Presented at: IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 5-9 December 2015, Cairo, Egypt.
Start Date: 6-Dec-2015
End Date: 9-Dec-2015
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Citation: Proceedings of 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 137-140
Abstract: FinFET technology appears as an alternative solution to mitigate short-channel effects in traditional CMOS down-scaled technology. Emerging embedded systems are likely to employ FinFET and dynamic voltage scaling (DVS), aiming to improve system performance and energy-efficiency. This paper claims that the use of DVS increases the susceptibility of FinFET-based SRAM cells to soft errors under radiation effects. To investigate that, a methodology that allows determining the critical charge according to the dynamic behaviour of the temperature as a function of the voltage scaling is used. Obtained results support our claim by showing that both temperature and voltage scaling can increase up to five times the susceptibility of FinFET-based SRAM cells to the occurrence of soft errors.
DOI Link: 10.1109/ICECS.2015.7440268
ISBN: 978-1-5090-0246-7/
Version: Post-print
Status: Peer-reviewed
Type: Conference Paper
Rights: Copyright © IEEE, 2015. This is an open-access article distributed under the terms of the Creative Commons Attribution-Non Commercial-No Derivatives License ( ), which permits use and distribution in any medium, provided the original work is properly cited, the use is non-commercial and no modifications or adaptations are made.
Appears in Collections:Conference Papers & Presentations, Dept. of Engineering

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