Please use this identifier to cite or link to this item: http://hdl.handle.net/2381/37454
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dc.contributor.authorRosa, Felipe R.-
dc.contributor.authorKastensmidt, Fernanda-
dc.contributor.authorReis, Ricardo-
dc.contributor.authorOst, Luciano-
dc.date.accessioned2016-04-27T12:54:46Z-
dc.date.available2016-04-27T12:54:46Z-
dc.date.issued2015-10-14-
dc.identifier.citation2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), Proceedings of., 2015, pp. 211-214en
dc.identifier.issn1550-5774-
dc.identifier.urihttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7315164en
dc.identifier.urihttp://hdl.handle.net/2381/37454-
dc.description.abstractIncreasing chip power densities allied to the continuous technology shrink is making emerging multiprocessor embedded systems more vulnerable to soft errors. Due the high cost and design time inherent to board-based fault injection approaches, more appropriate and efficient simulation-based fault injection frameworks become crucial to guarantee the adequate design exploration support at early design phase. In this scenario, this paper proposes a fast and flexible fault injector framework, called OVPSim-FIM, which supports parallel simulation to boost up the fault injection process. Aiming at validating OVPSim-FIM, several fault injection campaigns were performed in ARM processors, considering a market leading RTOS and benchmarks with up to 10 billions of object code instructions. Results have shown that OVPSim-FIM enables to inject faults at speed of up to 10,000 MIPS, depending on the processor and the benchmark profile, enabling to identify erros and exceptions according to different criteria and classifications.en
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.rightsCopyright © IEEE, 2015. The version of the article associated with this record is distributed under the terms of the Creative Commons Attribution-Non Commercial-No Derivatives License (http://creativecommons.org/licenses/by-nc-nd/4.0/ ), which permits use and distribution in any medium, provided the original work is properly cited, the use is non-commercial and no modifications or adaptations are made.en
dc.titleA Fast and Scalable Fault Injection Framework to Evaluate Multi/Many-core Soft Error Reliabilityen
dc.typeConference Paperen
dc.identifier.doi10.1109/DFT.2015.7315164-
dc.description.statusPeer-revieweden
dc.description.versionPost-printen
dc.description.presentedIEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 12-14 Oct. 2015, Amherst, MA .en
dc.date.end2015-10-14-
dc.date.start2015-10-12-
pubs.organisational-group/Organisationen
pubs.organisational-group/Organisation/COLLEGE OF SCIENCE AND ENGINEERINGen
pubs.organisational-group/Organisation/COLLEGE OF SCIENCE AND ENGINEERING/Department of Engineeringen
Appears in Collections:Conference Papers & Presentations, Dept. of Engineering

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